• Presentations files and full presentation videos are available from Jan. 10 to 28.
  • Live chat Q&A sessions, which all the speakers and session chairs in each session are attending, are held according to the time table here.
  • Before the live chat Q&A in the sessions of regular, special session, and university design contest, there are 5 minutes pitch talk videos for each paper broadcasted via WebEx. (WebEx URL will be provided in another way.)
  • Designers' Forum will start live chat Q&A directly at the beginning of the sessions.
  • Keynote speeches and tutorials are given live on WebEx according to the time table below.
  • Time zone is TST (=UTC+8:00)

Opening and Keynote I
(Opening is on video. Keynote I is by live broadcast)
"Boosting Productivity and Robustness in the SysMoore with a Triple-play of Hyperconvergency, Analytics, and AI Innovations"
Shankar Krishnamoorthy (Synopsys, USA)
Time: 8:20 - 10:00, Tuesday, January 18, 2022

Keynote II
(Live broadcast)
"Powering a Quantum Future through Quantum Circuits"
Jerry M. Chow (IBM, USA)
Time: 9:00 - 10:00, Wednesday, January 19, 2022

Keynote III
(Live broadcast)
"EDA Opportunities for Future HPC and 3D IC Integration"
Ken Wang (TSMC, Taiwan)
Time: 9:00 - 10:00, Thursday, January 20, 2022

Special Sessions

1A University Design Contest-1
Time: 10:00 - 10:35, Tuesday, January 18, 2022

2A University Design Contest-2
Time: 10:35 - 11:10, Tuesday, January 18, 2022

1B (SS-1) New Advances towards Building Secure Computer Architectures
Time: 10:00 - 10:35, Tuesday, January 18, 2022

2B (SS-2) Analog Circuit and Layout Synthesis: Advancement and Prospect
Time: 10:35 - 11:10, Tuesday, January 18, 2022

4A (SS-3) Technology Advancements inside the Edge Computing Paradigm and using the Machine Learning Techniques
Time: 10:00 - 10:35, Wednesday, January 19, 2022

7A (SS-4) Reshaping the Future of Physical and Circuit Design, Power and Memory with Machine Learning
Time: 10:00 - 10:35, Thursday, January 20, 2022

9A (SS-5) Artificial Intelligence on Back-End EDA: Panacea or One-Trick Pony?
Time: 11:10 - 11:45, Thursday, January 20, 2022

Designers' Forum

3A (DF-1) Key Drivers of Global Hardware Security
Time: 11:10 - 11:55, Tuesday, January 18, 2022

5A (DF-2) Compiler and Toolchain for Efficient AI Computation
Time: 10:35 - 11:10, Wednesday, January 19, 2022

6A (DF-3) AI for Chip Design and Testing
Time: 11:10 - 11:45, Wednesday, January 19, 2022

8A (DF-4) Empowering AI through Innovative Computing
Time: 10:35 - 11:10, Thursday, January 20, 2022


Tutorial-1: 9:00 - 12:00, Monday, January 17, 2022
IEEE CEDA DATC RDF and METRICS2.1: Toward a Standard Platform for ML-Enabled EDA and IC Design

Jinwook Jung (IBM Research, USA)
Andrew B. Kahng (UCSD, USA)
Seungwon Kim (UCSD, USA)
Ravi Varadarajan (UCSD, USA)

Tutorial-2: 9:00 - 12:00, Monday, January 17, 2022
Low-bit Neural Network Computing: Algorithms and Hardware

Zidong Du (Chinese Academy of Sciences, China)
Haojin Yang (Hasso-Plattner-Institute, Germany)
Kai Han (Huawei Technology, China)

Tutorial-3: 9:00 - 12:00, Monday, January 17, 2022
Side Channel Analysis: from Concepts to Simulation and Silicon Validation

Makoto Nagata (Kobe Univ., Japan)
Lang Lin (ANSYS Inc, USA)
Yier Jin (Univ. of Florida, USA)

Tutorial-4: 13:30 - 16:30, Monday, January 17, 2022
New Techniques in Variational Quantum Algorithms and Their Applications

Tamiya Onodera (IBM Research, Japan)
Atsushi Matsuo (IBM Research, Japan)
Rudy Raymond (IBM Research, Japan)

Tutorial-5: 13:30 - 16:30, Monday, January 17, 2022
Towards Efficient Computation for Sparsity in Future Artificial Intelligence

Fei Sun (Alibaba Group, China)
Dacheng Liang (Biren Technology, China)
Yu Wang (Tsinghua Univ., China)

Tutorial-6: 13:30 - 16:30, Monday, January 17, 2022
Scan-based DfT: Mitigating its Security Vulnerabilities and Building Security Primitives

Aijiao Cui (Harbin Inst. of Tech., China)
Gang Qu (Univ. of Maryland, USA)

Last Updated on: December 16, 2021